Indian Institute of Technology Madras
BS Degree Programme · Examination & Study Paper
Computer System Design
Multiplexers, decoders & delays
Examination Instructions & Guidelines
- Solve on notebook/paper first before checking solutions.
- MCQ: Exactly 1 option is correct. Negative marking applies.
- NAT: Numerical response. No negative marking.
- Scientific calculator allowed for all calculations.
- Official answer key is sealed at the end of this sheet.
Quiz 1 · 26 Oct 2025 (AN)Quiz 1
- Q1MCQ5 Marks·Choose one option
- A
- B
- C
- D
- E
- A
- Q2NAT3 Marks·Write the number
Given that NOT, 2-input AND/OR gates have delays of 1 ns, what will be the maximum delay of a 3x8 Decoder circuit? Note: if the answer is 1 ns, write 1.
Your answer: - Q3NAT5 Marks·Write the number
Your answer: - Q4NAT5 Marks·Write the number
Consider the circuit diagram shown below.
Given that we only have 4:1 mux gates, what is the minimum number of mux gates needed to represent the circuit diagram above?Your answer:
End Term · 31 Aug 2025 (FN)End Term
- Q5MCQ1 Mark·Choose one option
In a decoder, at any point, exactly one of the outputs is 1 and all the rest are 0s.
- ATrue
- BFalse
- Q6NAT3 Marks·Write the number
Your answer:
End Term · 31 Aug 2025 (AN)End Term
- Q7MCQ1 Mark·Choose one option
In a decoder, at any point, exactly one of the outputs is 1 and all the rest are 0s.
- ATRUE
- BFALSE
- Q8NAT3 Marks·Write the number
Your answer:
Quiz 2 · 3 Aug 2025 (AN)Quiz 2
- Q9MCQ1 Mark·Choose one option
A multiplexer is a digital circuit that selects one of the several input signals and forwards it to a single output line.
- ATRUE
- BFALSE
Read the passage below, then answer Q10
Answer the given two subquestions based on the given minterm :
Q10NAT3 Marks·Write the numberIf we want to design the given minterm using 2:1 multiplexers, what is the minimum number of multiplexers required?
Your answer: